From 701781b23e58fbf9f7cf21b2ce7b2ef7682cdf95 Mon Sep 17 00:00:00 2001
From: Marek Wolan <marek.wolan@methods.co.uk>
Date: Tue, 20 Feb 2024 11:05:09 +0000
Subject: [PATCH] Clear link load in new timestep

---
 src/primaite/simulator/network/hardware/base.py | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/primaite/simulator/network/hardware/base.py b/src/primaite/simulator/network/hardware/base.py
index 5334021a..01dd736d 100644
--- a/src/primaite/simulator/network/hardware/base.py
+++ b/src/primaite/simulator/network/hardware/base.py
@@ -599,6 +599,11 @@ class Link(SimComponent):
     def __str__(self) -> str:
         return f"{self.endpoint_a}<-->{self.endpoint_b}"
 
+    def apply_timestep(self, timestep: int) -> None:
+        """Apply a timestep to the simulation."""
+        super().apply_timestep(timestep)
+        self.current_load = 0.0
+
 
 class ARPCache:
     """